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Location Call # Volume Status
 E-BOOK      
Author Kaxiras, Stefanos.
Title Computer architecture techniques for power-efficiency / Stefanos Kaxiras, Margaret Martonosi.
Edition First edition.
OCLC 200805CAC004
ISBN 9781598292091 (electronic bk.)
9781598292084 (pbk.)
ISBN/ISSN 10.2200/S00119ED1V01Y200805CAC004 doi
Publisher San Rafael, Calif (1537 Fourth Street, San Rafael, CA 94901 USA) : Morgan & Claypool Publishers, 2008.
Description 1 electronic text (xi, 207 pages : illustrations\.) : digital file.
LC Subject heading/s Computer architecture.
Mechanical efficiency.
SUBJECT Chip multiprocessors (CMPs)
Computer power consumption.
Computer energy consumption.
Low power computer design.
Computer power efficiency.
Dynamic power.
Static power.
Leakage power.
Dynamic voltage/frequency scaling.
Computer architecture.
System details note Mode of access: World Wide Web.
System requirements: Adobe Acrobat Reader.
Bibliography Includes bibliographical references (pages 189-207).
Contents Introduction -- Modeling, simulation, and measurement -- Using voltage and frequency adjustments to manage dynamic power -- Optimizing capacitance and switching activity to reduce dynamic power -- Managing static (leakage) power -- Conclusions.
Restrictions Abstract freely available; full-text restricted to subscribers or individual document purchasers.
Access may be restricted to authorized users only.
Unlimited user license access
NOTE Compendex.
INSPEC.
Google book search.
Summary In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and a slowdown in frequency increase.
NOTE Google scholar.
Additional physical form available note Also available in print.
General note Part of: Synthesis digital library of engineering and computer science.
Title from PDF t.p. (viewed on Nov. 7, 2008).
Series from website.
Permanent link back to this item
https://novacat.nova.edu:446/record=b2328761~S13

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